NOVA
Native Optimal Vector Algebra — QUASAR Region II
QUASAR · d=64 · GF(2⁶) · WS12 synthesis target
QUASAR NOVA is QLT's first QUASAR chip and the WS12 Rung 3 synthesis endpoint — the near-term optimal balance between Hilbert dimension, fab yield, OPC bandwidth margin, calibration tractability, and mature GF(64) = GF(2⁶) coding theory. One photon, sixty-four spectral colors, 6 bits/photon, native char-2 field arithmetic, and algebraic computing on optical fields in Region II (0.2 ≤ Q < 1) where OPC and squeeze are co-equal with the linear QFP mesh.
4032 pairwise phase relationships · Bcomb = 3.15 THz · ~4× OPC margin @ 12 THz · 4×16 AWG tree · RS(63,55) + X₆₄/Z₆₄. These numbers appear in hero copy — not buried in expandables.
NOVA specification ledger
Canonical numbers from WS12 G46–G53 and S41–S50 corpus.
| Property | Value | Status |
|---|---|---|
| Brand line | QUASAR (Region II) | claim |
| Hilbert dimension d | 64 = 2⁶ | info-theoretic |
| Algebraic layer | GF(64) = GF(2⁶), char 2 | roadmap |
| Bits / photon | 6 | info-theoretic |
| Q-metric region | Region II, Q ≈ 0.25–0.45 | designed/target |
| Comb spacing Δf | 50 GHz | designed/target |
| Comb span Bcomb | ≈3.15 THz (63×Δf) | model |
| OPC bandwidth margin | ~4× @ 12 THz | claim |
| Phase relationships | N(N−1) = 4032 | model |
| FWM pathways | ~262k (d²(d−1)) | model |
| QFP cells (~Reck) | ~2016 | model |
| Fab architecture | 8 octets × 8 rings; 4×16 AWG | designed/target |
| WS12 role | Rung 3 synthesis endpoint | strategic |
| First QUASAR | After TETRIS; before SUPER | lineage |
N-01 · Hero
N-02 · Balance radarOptimal balance point thesis
S41 — why NOVA is the WS12 synthesis target and first QUASAR.
Four constraints, one sweet spot
Coding · OPC · Calibration · RoutingMature 6-bit coding ecosystem
→RS(63,55), BCH, LDPC over GF(64) are telecom-industry standard. 6-bit symbols align with DVB/DOCSIS IP and standards bodies — the coding-theory payoff of the WS12 Rung 3 ladder.
How we do it: Native GFADD/GFMUL on QFP mesh; RSENC/RSCHK as ISA extensions (G17, G16).
~4× margin — last comfortable one-pass
→3.15 THz comb span ≪ 12 THz FWM acceptance — one broadband conjugation pass still covers all 64 bins. Last chip with comfortable headroom before THETA/LOTUS split-band OPC (~1.2× at d=512).
How we do it: Hybrid Si₃N₄/As₂S₃ nodes every M=8–12 gates; comb-derived refresh roadmap (G45).
ChiL at 4032 phase pairs
→4032 pairwise witnesses is large but ChiL self-calibration targets O(1) convergence vs O(N) sweeps; octet tiling factorizes 64→8×8. Hard but bounded — SUPER's 16,256 pairs approaches calibration crisis.
4× TETRIS (992) · 16× GALAXY (240)
4×16 tree — TETRIS limit solved
→TETRIS flagged monolithic AWG resolution as the fab ceiling from d=32 upward. NOVA's designed response: cascaded 4×16 AWG tree aligned to octet tiling — not a larger single AWG (G52).
How we do it: Octet pre-demux → four 16-ch AWGs → per-bin Vernier trim; ε ≤ −30 dB cascaded target.
Native GF(64) FAU
External 64×64 unitaries lack field layer. NOVA adds GFADD/GFMUL, RS(63,55), and OPC pre-QEC on integrated tile.
First QUASAR
TETRIS is last STAR-PHASER (Q<0.2). NOVA crosses into Region II where OPC + squeeze are co-equal — not LOTUS field-computing.
~6×8 mm²
G46 three-tile floorplan: SOURCE · QFP/FAU · READOUT. Same materials stack as decit — channel count scales.
64-bin microcomb realism
S42 — spectral floorplan, octet guards, ~262k FWM pathways.
Single-photon qudit: |ψ⟩ = Σn=062 cn|fn⟩ with Σ|cn|² = 1. Bins at Δf = 50 GHz; comb spans Bcomb ≈ 3.15 THz. Active data bins f₀…f₆₂; f₆₃ guard for α⁶³ degeneracy (G04).
p(x) = x⁶ + x + 1 (primitive over GF(2), 0x43) GF(64) ≅ GF(2)[x]/(p(x)) |f_k⟩ ↔ α^k for k = 0…62 Pathways ≈ d²(d−1) = 64² × 63 ≈ 258,048 ≈ 262k
Critical honesty: Bin index k is not integer addition in GF(64). Gates implementing X₆₄ are SU(64) permutations, not field addition. Quantum superposition ≠ classical GFADD.
| Compute grid | f₀…f₆₂ (3.10 THz) |
| f₆₃ guard | 1 bin · α⁶³ degeneracy |
| Inter-octet guard | ≥2Δf × 7 gaps |
| Total allocated | ~4.0–4.5 THz ≪ 12 THz OPC |
| Octet tiling | OCT0…OCT7 · 8 bins each |
50 GHz SiN combs and D=10–15 entanglement are demonstrated externally; 64-bin birth coherence on one QLT die is designed/target pending T-G46.
How we do it: Route A SFWM ring R≈480 µm (primary) or Route B EO sideband comb (fallback); mask-programmed k → 6-bit polynomial ROM; window masks dump |n|>63 every QFP stage; `grid_valid` gates encode; OPC between epochs resets φ(ω) before 4032 witnesses drift.
N-03 · N-04SU(64) tier model & 6-bit FAU
S43 — named primitives, GFADD/GFMUL kernels, ~2016 QFP cells.
X₆₄^k | |n⟩→|n+k mod 64⟩ | depth 1–2 |
Z₆₄^k | |n⟩→ω^n|n⟩ | depth 1 |
F₆₄ | DFT₆₄ | depth 12–32 |
GFADD | a⊕b char-2 XOR | depth 1 |
GFMUL | log + antilog mod 63 | depth 3 |
Tier B: Clifford+T stabilizer rounds. Tier C: arbitrary SU(64) — tomography only, not hot QEC loop (G20 honesty).
# tunable cells ≈ d(d−1)/2 = 2016 F₆₄: 12–32 QFP sandwiches + OPC every 8–12 GFADD: char-2 gift — no carry, depth 1 Generic SU(64): 80–150 depth — NOT production
Harmonic RF bus: up to 32 tones at f_m = m·Δf on bonded TFLN modulator. Offline BRAM stores ~512 frozen RF parameters. Octet shaper bank applies per-bin phase within each 8-ring tile.
How we do it: Microprogram ROM compiles {X₆₄, Z₆₄, F₆₄, GFADD, GFMUL} to EOM IQ tables + shaper DAC masks; FAU mode mux on same waveguide as decit tile; insert As₂S₃ OPC every 8–12 sandwiches; production microprograms refuse Tier C at runtime.
N-05 · N-06G46 three-tile GF(64) die
S44 — SOURCE · QFP/FAU · READOUT co-integration.
[SOURCE] [QFP / FAU] [READOUT] 64-line comb → EOM₁→SPU₈→EOM₂→…→OPC→… → 4×16 AWG tree pump reject harmonic RF bus 64-ch WDM → SPAD comb lock 8 octet shaper banks octet-aligned drops [OCT0: f₀…f₇] [OCT1: f₈…f₁₅] … [OCT7: f₅₆…f₆₃] ≥2Δf guard between octets
- Route A — R ≈ 480 µm SFWM ring, FSR ≈ 50 GHz
- Route B — EO sideband comb fallback on seed ring
- Pump rejection ≥110 dB cascade
- Loaded Q 10⁵–10⁶ · Bcomb = 3.15 THz
- Si₃N₄ — backbone routing, source ring, AWG
- Etchless TFLN bond — EOM stages, Vπ·L ≈ 2.5 V·cm
- As₂S₃ OPC overlay — post-500 °C, >12 THz band
- 64 shaper rings · ~80–96 heater DAC channels
How we do it: Mask signoff Δf=50 GHz, octet tiling, f₆₃ guard, 4×16 AWG before GDS merge; Si₃N₄ FEOL → heater/RF metal → TFLN bond → As₂S₃ OPC → 64-output fiber fan-out; bring-up T-G46: WDM scan → comb lock → octet TED → F₆₄|0⟩ → demux crosstalk → GFADD+OPC.
N-07 · N-084×16 AWG tree — TETRIS limit solved
S45 — G52 response to S35 AWG resolution flag.
TETRIS flagged AWG resolution as the limiting fab factor from d=32 upward. NOVA solves it with a cascaded 4×16 AWG tree aligned to octet tiling — not a monolithic 64-port device. Target ε ≤ −30 dB cascaded → F_read ≈ 0.998.
| Level | Device | Function |
|---|---|---|
| L0 | 8-ring octet pre-demux | Coarse split by octet sub-band |
| L1 | 4× SiN AWG, 16 ch each | Fine spectral routing → 64 ports |
| L2 | Vernier ring / MZI per bin | Residual alignment post-AWG |
Monolithic 64-ch AWG rejected: SiN AWGs cap at 8–16 ch with −13 to −20 dB crosstalk. Cascaded tree targets −30 dB aggregate with octet-parallel bring-up — one AWG failure does not kill all 64 channels.
3D routing: dual-layer SiN interposer converts high-loss in-plane crossings into ~100× lower-loss interlayer crossings when 2D plane congests at 6×8 mm².
How we do it: Co-design octet drops with shaper banks (shared thermal zone); layout four 16-ch AWG staggered across octets; calibrate 64×64 confusion matrix C at fab test; store C⁻¹ in BRAM; signoff T-G46 #7.8: ε ≤ −30 dB cascaded.
N-09 · N-104032 pairwise phase relationships
S46 — N(N−1) = 64×63; ChiL self-calibration committed at d=64.
Each relative phase φnm must be held within tolerance for F_orth ≥ 0.999 across compute epochs. Brute-force O(kN) sweeps over 64 rings are prohibitive — NOVA commits ChiL chip-in-the-loop self-calibration targeting O(1) convergence at >9-bit precision in ~10 iterations (G53).
4032 = N(N−1) N=64 GALAXY 240 · TETRIS 992 · NOVA 4032 · SUPER 16256 `grid_valid` gates ALL compute until max |Δf_err_n| < 0.5 GHz on active teeth
- L0 — Global — package TEC + bus heater → f_ref anchor
- L1 — Octet coarse — 8 heaters → f_octet,k = f_ref + 8k·Δf
- L2 — Tooth fine — 64 heaters → f_n = f_ref + n·Δf
- L3 — TED eigenbasis — cancel thermal bloom cross-talk
Sparse witness strategy: not all 4032 pairs measured every epoch — 4032 is the worst-case diligence budget.
Co-trim routing: AWG slices and octet drops share thermal zones with shaper octets — one calibration loop aligns spectral phase and WDM routing (G53 §2.5). How we do it: octet floorplan before GDS; wafer scatter map; hierarchical L0→L3 lock; ChiL epoch against demux + homodyne objective; kHz tooth servos with G40 RELOCK if |Δf_err| > 0.3 GHz.
N-11 · N-12N→Nreduced pre-QEC pipeline
S47 — OPC co-equal with QFP; OPC never replaces QEC.
OPC does not replace QEC. OPC is a pre-layer that reduces ε_raw before RS(63,55) and X₆₄/Z₆₄ stabilizers act. Any shortcut arrow labeled "OPC only" is banned from all NOVA copy.
ε_raw → [OPC φ→−φ + squeeze 4–7 dB + refresh L9] → ε_reduced → [RS(63,55) + X₆₄/Z₆₄] → logical Q ≈ (0.08 + 0.12 + 0.10) / 0.70 ≈ 0.43 [model, designed/target] OPC interval M = 8–12 gates · bandwidth margin ~4× @ 3.15/12 THz
- Post-F₆₄ / pre-demux — dispersion reset before detect
- Post-GFMUL chain — FAU kernel phase refresh
- Mid-cascade every 8–12 stages — bound V_∞ during deep QFP
- Comb-derived mesh (G45 Rung 3) — teeth as pumps, roadmap
- 4–7 dB squeezing — phase-syndrome SNR (Z-type)
- Ge homodyne — 64 parallel or 8× time-mux
- CV-DV hybrid — SPAD for X-type; homodyne for Z-type
- GALAXY rehearsed 3–6 dB optional; NOVA raises squeeze to co-equal
How we do it: Hybrid Si₃N₄/As₂S₃ nodes post-FAU + mid-cascade; firmware inserts OPC_PASS every M=8–12 stages; log ε_raw and ε_reduced separately in telemetry; no-cloning honesty — η < 1 implies heralded erasure, not perfect restoration (~3 dB/pass CW → ~1 dB roadmap).
N-13 · N-14RS(63,55) + X₆₄/Z₆₄ field-native ECC
S48 — classical and quantum layers share GF(64) symbols.
NOVA is QLT's first system where RS/BCH/LDPC and X₆₄/Z₆₄ stabilizer codes share the native symbol field GF(64) at industry-standard 6-bit width. Syndromes are field elements s ∈ GF(64); parity is GFADD/GFMUL on photonic symbols.
RS(63,55): n=63, k=55, t=4 errors OR 8 erasures X₆₄(α^ℓ): |k⟩ → |k+ℓ mod 64⟩ Z₆₄(β): |k⟩ → χ(β·α^k)|k⟩ Sparse v1: 18 stabilizer generators (decit analogue) Full dense: 126 generators — model, not v1 hot path
| L6 classical | RS(63,55) · RSENC on FAU · RSDEC on FPGA |
| L7 quantum | X₆₄/Z₆₄ CSS · sparse 18-gen v1 |
| Syndrome | 6-bit s ∈ GF(64) · CORRECT ~11.2 ns |
| Erasure-first | Heralded loss → 2× RS correction power |
Theory + FPGA decode demonstrated; photonic QEC rounds roadmap
How we do it: RSENC via GFMUL chain on bins 0–62; RSCHK on FPGA ESU; erasure flags from herald engine; sparse 18-generator stabilizer schedule with U_k compiler + SPAD/homodyne fork; OPC_PASS between batches if round exceeds visibility budget; logical interface never conflated with decimal digits (G04 firewall).
N-15 · N-16Algebraic computing on optical fields
S49 — not "64-level analog" or base-64 decimal.
Application domains
All claims carry roadmap / designed/target labelsTelecom-aligned channel coding
→Native RS(63,55) encode/decode on 6-bit photonic symbols. Industry RS at byte level is demonstrated worldwide; NOVA claims photonic symbol engine integration.
Qudit stabilizer pilots
→d=64 qudit stabilizers in same Hilbert space as classical RS. Erasure-heavy channels from heralded loss → known positions.
Spectral AI kernels — MATMUL₆₄
→F₆₄ depth 12–32 is production Tier A — credible Fourier-basis MATMUL₆₄ and ATTEND₆₄ kernels with OPC-aware scheduling.
GF(64) stream mixing
→GFMUL depth-3 on photons for stream cipher mixing and MPC pilots. 6-bit symbol packing — not decimal conflation.
64-node spectral lattice
→One qudit = one node label in 64-vertex spectral graph. Calibration reference at industry-standard field size.
N-17 · N-18Where NOVA sits
Today's chip vs tomorrow's synthesis target
GEMINI is the shipping STAR-PHASER reference SKU. NOVA is the WS12 GF(64) roadmap synthesis target — first QUASAR, Region II hybrid, optimal balance point before SUPER's calibration crisis.