Role in QLT Fabrication
The flip-chip bonder performs the most alignment-critical step in QLT's hybrid photonic integration process: precision placement and bonding of thin-film lithium niobate (TFLN) components onto the Si₃N₄ photonic integrated circuit. This heterogeneous integration creates a hybrid LiNbO₃/Si₃N₄ waveguide structure where the high electro-optic coefficient of LiNbO₃ (r₃₃ = 31 pm/V) enables ultrafast phase modulation, while the low-loss Si₃N₄ platform provides the passive photonic circuit backbone.
The bonding process must achieve sub-micron lateral alignment (±1 μm) between the TFLN chiplet waveguides and the Si₃N₄ bus waveguides on the PIC. Misalignment beyond ±1.5 μm causes catastrophic mode-coupling loss (> 3 dB per transition), rendering the hybrid waveguide section non-functional for quantum-grade operation where total insertion loss budgets are measured in tenths of a dB.
The flip-chip bonder creates the hybrid photonic structure through:
- Precision alignment ● high-resolution split-optics (top-through and bottom-through viewing) enable ±0.5 μm placement accuracy using fiducial marks on both die and substrate
- Controlled bonding ● thermocompression or adhesive bonding at 200–300°C under controlled force (0.1–10 N) creates permanent, low-stress joints
- Gap control ● bondhead Z-axis resolution of 0.1 μm ensures consistent adhesive thickness and evanescent coupling gap
- Parallelism ● automated tilt compensation (< 0.5 mrad) ensures uniform contact across the TFLN chiplet
- In-situ verification ● integrated metrology confirms alignment before final bond cure
Bonding Methods for Photonic Integration
Bonding Requirements for QLT
Hybrid Integration Architecture
HYBRID LiNbO₃/Si₃N₄ WAVEGUIDE STRUCTURE:
CROSS-SECTION (at bonding region):
┌─────────────────────────────┐
│ LiNbO₃ thin film │ ← 300–600 nm X-cut TFLN
│ (n = 2.21 @ 1550 nm) │ (NANOLN or Partow)
├─────────────────────────────┤
│ BCB adhesive / SiO₂ bond │ ← 100–500 nm bonding layer
├─────────────────────────────┤
│ SiO₂ top cladding │ ← remaining PECVD SiO₂
├─────────────────────────────┤
│ ▓▓▓ Si₃N₄ waveguide ▓▓▓ │ ← 350 nm × 900 nm core
├─────────────────────────────┤
│ SiO₂ bottom cladding │ ← 3.3 μm thermal oxide
├─────────────────────────────┤
│ Si substrate │
└─────────────────────────────┘
EVANESCENT COUPLING:
├── Mode overlap between Si₃N₄ and LiNbO₃ layers
├── Coupling gap (SiO₂ + adhesive): 100–500 nm
├── Thinner gap → stronger coupling but tighter alignment req.
├── Transition length: 50–200 μm (adiabatic taper)
└── Target: > 95% power transfer per transition (< 0.2 dB)
ALIGNMENT FIDUCIALS:
├── Si₃N₄ PIC: Au/Cr cross-hair marks at four corners
├── TFLN chiplet: etched vernier marks on LiNbO₃
├── Bonder camera: split-optics view both simultaneously
├── Fine alignment: piezo stage, 0.1 μm resolution
└── Verification: overlay measurement post-bond (SEM or IR microscopy)
Technical Specifications
SUSS MicroTec FC150 Flip-Chip Bonder
SET FC300 Flip-Chip Bonder
Process Integration
QLT PROCESS FLOW ● Flip-Chip Bonder (Step C — ODR Integration):
PRE-REQUISITES:
├── Si₃N₄ PIC fully processed:
│ ├── Waveguides, heaters, contacts complete
│ ├── PECVD SiO₂ cladding with bonding windows opened
│ ├── Alignment fiducials exposed (Au cross-hair marks)
│ └── Surface plasma-cleaned (O₂ asher, Step B3)
├── TFLN chiplet prepared:
│ ├── X-cut LiNbO₃ thin film on handle wafer (NANOLN/Partow)
│ ├── Waveguides etched by Ar⁺ milling or RIE
│ ├── Diced to individual chiplets (1 mm × 5 mm typical)
│ ├── Alignment vernier marks etched
│ └── Bonding surface: CMP-polished SiO₂, RMS < 0.5 nm
└── Adhesive prepared (if adhesive bonding):
└── BCB (Cyclotene 3022-35) spin-coated on PIC, soft-baked
STEP 1: Surface Preparation
├── O₂ plasma activation: 100 W, 30 s (both PIC and chiplet)
│ └── Creates hydrophilic surfaces for direct bonding
│ └── OR: activates BCB adhesive surface for adhesive bonding
├── Verify surface cleanliness (particle-free under dark-field)
└── Load PIC onto bonder substrate stage (vacuum chuck)
STEP 2: Die Pick & Flip
├── TFLN chiplet placed face-up on source tray
├── Bondhead picks chiplet with vacuum collet
├── Chiplet flipped 180° (waveguide side now faces down)
├── Collet holds chiplet above PIC at safe height (~500 μm gap)
└── Coarse X-Y positioning to bonding region
STEP 3: Fine Alignment
├── Split-optics engage: camera views both chiplet and PIC marks
├── Pattern recognition software locates fiducial centers
├── Piezo stage adjusts X, Y, θ to align cross-hairs
├── Alignment accuracy: better than ± 0.5 μm
├── Operator verifies on-screen overlay; confirms alignment
└── Z-axis slowly descends chiplet toward PIC surface
STEP 4: Bonding
├── DIRECT BONDING (preferred):
│ ├── Contact at room temperature with 1–5 N force
│ ├── Van der Waals pre-bond forms (reversible)
│ ├── Heat to 250°C at 5°C/min under constant force
│ ├── Hold at 250°C for 2 hours → covalent bond forms
│ └── Cool to room temperature; release collet
├── ADHESIVE BONDING (alternative):
│ ├── BCB layer on PIC: 200–500 nm (pre-applied)
│ ├── Contact with 0.5–2 N force; BCB squeezes to target gap
│ ├── Heat to 250°C; hold 60 min → BCB cross-links (> 95%)
│ └── Cool; BCB cured; permanent bond
└── Bond profile logged: temperature, force, time, displacement
STEP 5: Post-Bond Verification
├── IR microscope: verify alignment (view through Si substrate)
├── Overlay measurement: ΔX, ΔY, Δθ vs target
│ └── Pass criteria: < ±1.0 μm lateral, < 0.5 mrad rotation
├── Optical coupling test (if possible at this stage):
│ └── Inject light into Si₃N₄ bus; measure power in TFLN section
├── Visual: no cracks, voids, or delamination
└── Record bond quality data for process control
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Die Handling Best Practices
TFLN CHIPLET HANDLING:
CRITICAL: LiNbO₃ thin films are EXTREMELY fragile
├── Thickness: 300–600 nm on handle substrate
├── Even minor contact can cause chipping or cracking
├── Always handle with vacuum wand — NEVER tweezers on film side
└── Store in gel-pak trays; do not stack
SURFACE PREPARATION:
├── Both surfaces must be particle-free for direct bonding
├── Class 100 cleanroom or laminar flow hood required
├── Plasma activation: O₂ or N₂ plasma, 100 W, 30 s
│ └── Creates Si-OH groups for covalent bonding
├── Time window: bond within 1 hour of activation
│ └── Surface reactivity decays exponentially after activation
└── DI water rinse + N₂ blow-dry if particles detected
ALIGNMENT MARK DESIGN:
├── PIC fiducials: 5 μm × 5 μm Au/Cr cross-hairs (4 corners)
├── TFLN fiducials: etched vernier scales (100 nm resolution)
├── Minimum 2 marks required for X, Y, θ correction
├── Preferred: 4 marks (one per corner) for overdetermination
└── Mark spacing: maximized for best angular resolution
POST-BOND INSPECTION:
├── IR microscopy: see through Si substrate to verify alignment
├── Acoustic microscopy (SAM): detect voids in bond interface
├── Razor blade test: verify bond strength (> 1 J/m² for direct bond)
├── Optical test: couple light and measure transition loss
└── Accept criteria: ΔX, ΔY < ±1 μm; no visible voids; loss < 0.5 dB